Solid State Drives (SSDs) are often implemented using Not-AND (NAND) flashes. The typical NAND flash holds charge in its floating gate. Depending on the amount of charge stored, a threshold voltage used to switch the NAND flash changes. Different threshold voltages correspond to different charge levels and therefore denote different values of stored data bits. As a NAND flash cell is programmed or erased, charges are injected into or expelled from the floating gate, forming temporary tunnels through the dielectric insulators that surround the floating gate. Over time, as the cell undergoes more programming or erasing operations, the dielectrics become worn out, and the ability of the floating gate to hold charges is weakened. The worn-out dielectrics can lead to program/erase errors as well as read failures due to high error rate after data retention. The program/erase errors can be detected during the programming or erasing operations and can usually be immediately fixed by masking out the defective units. The read failures, however, are more difficult to handle because they typically manifest after a certain data retention period. Manufacturers often deal with the read failures by over-designing the NAND flash cells (e.g., by changing the geometry of the dielectric insulators), which tends to increase the cost of the SSD devices.